The present invention relates to semiconductor device fabrication and integrated circuits and, more specifically, to structures for reliability caps used in the manufacture of a field-effect transistor and methods for forming reliability caps used in the manufacture of a field-effect transistor.
Device structures for a field-effect transistor include a source, a drain, a body arranged between the source and drain, and a gate structure including a gate electrode and a gate dielectric separating the gate electrode from the body. A gate voltage applied to the gate electrode is used to provide switching that selectively connects the source and drain to each other through a channel formed in the body. The channel of a planar field-effect transistor is horizontal and located beneath the top surface of the substrate on which the gate structure is supported. In contrast, the channel of a fin-type field-effect transistor is vertical and located in a semiconductor fin where overlapped by the gate electrode. Other types of field-effect transistors include gate-all-around designs, such as horizontal nanosheet field effect transistors and vertical-transport field-effect transistors.
Either type of field-effect transistor may be formed with a gate structure that incorporates a high-k dielectric material as the gate dielectric and one or more metals as the gate electrode. After the high-k dielectric material is deposited, a series of thermal annealing steps may be performed to improve the reliability of the high-k dielectric material. A reliability cap is applied that operates as a barrier to protect the high-k dielectric material from exposure to oxygen in the ambient atmosphere during the thermal annealing.
Improved structures for reliability caps used in the manufacture of a field-effect transistor and methods for forming reliability caps used in the manufacture of a field-effect transistor are needed.